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Welcome to Microprocessors and Digital Systems Lab

Since 1985, Microprocessors Laboratory and Digital Systems Lab (MicroLab) specialises on the design and implementation of digital and microprocessor systems (ASIC, FPGA and System level). It is an official laboratory of the School of Electrical & Computer Engineering of NTUA. MicroLab has extensive background and experience in the fields of Hardware/Software Codesign, DSP systems implementation, High Level Synthesis, Reconfigurable Computing and Computer Arithmetic. It has participated in numerous projects that involve the design and implementation of Data Acquisition and Processing Systems, Telecommunication Hardware, Industrial Digital Systems, Data Encryption and Medical Applications. At present, MicroLab is actively pursuing research in the areas of reliability and fault-tolerance at the transistor, interconnect, circuit and system level. Among its recent activities have been low-power design, memory design, fault-tolerance and soft-error resilience techniques and modelling of scaling issues in nanometre technologies. MicroLab has participated in over 45 European and National projects, received 5 innovation awards from the industry (Intel, IBM) and other organisations and is an active member of ‘HiPEAC’s Reconfigurable Platforms Cluster’ and ‘ArtistDesign – Embedded Systems’.

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Announcements

  • On April 10, 2013 MicroLab organized the "SCC Day" workshop, featuring research that has occupied the Intel SCC from September 2011 up to March 2013 and is still ongoing. The SCC is an experimental processor created by Intel Labs. It is a 48-core "concept vehicle" created as a platform for many-core software research. A one-page summary per presented topic can be found in the informal proceedings uploaded here . We would like to thank the Students, PhD Candidates and Faculty Members from ECE-NTUA and from UOA that attended and contributed to this event

  • We received the Best Paper Award for the paper :
    Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis and Dimitrios Soudris, "A Framework for Supporting Parallel Application Placement onto Reconfigurable Platforms", 4th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures (PARMA), January 23, 2013, Berlin, Germany

  • In cooperation with the University of Bochum (RUB) and Karlsruhe Institute of Technology (KIT) we received the Best Paper Award for the paper:
    H. Sidiropoulos, K. Siozios, P. Figuli, D. Soudris and M. Hübner, "On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation", 19th Reconfigurable Architectures Workshop (RAW), May 2012, China.